In general, semiconductor devices are manufactured by fabrication processes forming electric circuits on a semiconductor substrate, such as a silicon wafer. Metals, like copper, are commonly deposited on the substrate to form the electric circuits. A barrier metal layer can be used to prevent the diffusion of copper ions into the surrounding materials. A seed layer can be subsequently deposited on the barrier layer to facilitate copper interconnect plating.
Recently, other metals, such as ruthenium and cobalt, have been introduced as seed layer materials to complement commonly used copper seed layers. Ruthenium, cobalt, and copper may be used separately or in combination to form seed layer stacks. One drawback of using ruthenium or cobalt as seed layer material is the tendency to oxidize quickly. The native oxide layer formed on a seed layer is not an optimal surface for interconnect metallization plating, particularly for small-sized damascene fill features (such as vias and trenches), for example, features measuring less than 50 nm in width. Therefore, there are advantages to reducing the oxide layer prior to initiating interconnect metallization deposition processes.
Therefore, there exists a need for an improved process for reducing the oxide layer formed on a seed layer.